YoungTaek Kim
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AUDIT: Stress testing the automatic way
Y Kim, LK John, S Pant, S Manne, M Schulte, WL Bircher, MSS Govindan
2012 45th Annual IEEE/ACM International Symposium on Microarchitecture, 212-223, 2012
Breeding process and characteristics of KG101, a superior line of Panax ginseng CA Meyer
WS Kwon, CM Chung, YT Kim, MG Lee, KT Choi
Journal of Ginseng Research 22, 11-17, 1998
Automated di/dt stressmark generation for microprocessor power delivery networks
Y Kim, LK John
IEEE/ACM International Symposium on Low Power Electronics and Design, 253-258, 2011
Fast exploration of parameterized bus architecture for communication-centric SoC design
C Shin, YT Kim, EY Chung, KM Choi, JT Kong, SK Eo
Proceedings Design, Automation and Test in Europe Conference and Exhibition …, 2004
Follow-up of ulcerative colitis: Short-term outcome to medical treatment and relapse rates
DK Chang, KL Lee, JG Kim, YT Kim, HC Jung, IS Song, K Choi, C Kim, ...
Korean J Gastroenterol 26 (26), 907-18, 1994
Fast and accurate transaction level modeling of an extended AMBA2. 0 bus architecture
YT Kim, T Kim, Y Kim, C Shin, EY Chung, KM Choi, JT Kong, SK Eo
Design, Automation and Test in Europe, 138-139, 2005
Guardband reduction for multi-core data processor
S Manne, R Desikan, S Pant, Y Kim
US Patent 9,223,383, 2015
Power control for multi-core data processor
S Manne, S Pant, Y Kim, MJ Schulte
US Patent 9,360,918, 2016
Performance boosting under reliability and power constraints
Y Kim, LK John, I Paul, S Manne, M Schulte
2013 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 334-341, 2013
A systematic IP and bus subsystem modeling for platform-based system design
J Um, WC Kwon, S Hong, YT Kim, KM Choi, JT Kong, SK Eo, T Kim
Proceedings of the Design Automation & Test in Europe Conference 1, 5 pp., 2006
Automating stressmark generation for testing processor voltage fluctuations
Y Kim, LK John, S Pant, S Manne, M Schulte, WL Bircher, MSS Govindan
IEEE Micro 33 (4), 66-75, 2013
Characterization and management of voltage noise in multi-core, multi-threaded processors
Y Kim
Impact of compiler optimizations on voltage droops and reliability of an SMT, multi-core processor
Y Kim, LK John, S Manne, M Schulte, S Pant
Proceedings of the First International Workshop on Secure and Resilient …, 2012
Method of securely transferring programmable packet using digital signatures having access-controlled high-security verification key
Y Kim, J Han, D Seo, S Sohn
US Patent App. 10/836,928, 2005
Automated di/dt Stressmark Generation for Microprocessor Power Distribution Networks
Y Kim, LK John
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