Schottky Barrier Height Engineering for Electrical Contacts of Multilayered MoS2 Transistors with Reduction of Metal-Induced Gap States GS Kim, SH Kim, J Park, KH Han, J Kim, HY Yu ACS nano 12 (6), 6292-6300, 2018 | 172 | 2018 |
Infrared Detectable MoS2 Phototransistor and Its Application to Artificial Multilevel Optic-Neural Synapse SG Kim, SH Kim, J Park, GS Kim, JH Park, KC Saraswat, J Kim, HY Yu ACS nano 13 (9), 10294-10300, 2019 | 108 | 2019 |
Effective Schottky Barrier Height Lowering of Metal/n-Ge with a TiO2/GeO2 Interlayer Stack GS Kim, SW Kim, SH Kim, J Park, Y Seo, BJ Cho, C Shin, JH Shim, HY Yu ACS applied materials & interfaces 8 (51), 35419-35425, 2016 | 44 | 2016 |
Specific Contact Resistivity Reduction Through Ar Plasma-Treated TiO2−xInterfacial Layer to Metal/Ge Contact GS Kim, JK Kim, SH Kim, J Jo, C Shin, JH Park, KC Saraswat, HY Yu IEEE Electron Device Letters 35 (11), 1076-1078, 2014 | 41 | 2014 |
Surface Passivation of Germanium Using SF6Plasma to Reduce Source/Drain Contact Resistance in Germanium n-FET GS Kim, SH Kim, JK Kim, C Shin, JH Park, KC Saraswat, BJ Cho, HY Yu IEEE Electron Device Letters 36 (8), 745-747, 2015 | 30 | 2015 |
Analytical study of interfacial layer doping effect on contact resistivity in metal-interfacial layer-Ge structure JK Kim, GS Kim, C Shin, JH Park, KC Saraswat, HY Yu IEEE Electron Device Letters 35 (7), 705-707, 2014 | 30 | 2014 |
The Effect of Interfacial Dipoles on the Metal-Double Interlayers-Semiconductor Structure and Their Application in Contact Resistivity Reduction SW Kim, SH Kim, GS Kim, C Choi, R Choi, HY Yu ACS applied materials & interfaces 8 (51), 35614-35620, 2016 | 27 | 2016 |
Asymmetrically contacted germanium photodiode using a metal–interlayer–semiconductor–metal structure for extremely large dark current suppression HJ Zang, GS Kim, GJ Park, YS Choi, HY Yu Optics Letters 41 (16), 3686-3689, 2016 | 23 | 2016 |
The efficacy of metal-interfacial layer-semiconductor source/drain structure on sub-10-nm n-type ge FinFET performances JK Kim, GS Kim, H Nam, C Shin, JH Park, JK Kim, BJ Cho, KC Saraswat, ... IEEE Electron Device Letters 35 (12), 1185-1187, 2014 | 23 | 2014 |
Schottky Barrier Height Modulation Using Interface Characteristics of MoS2 Interlayer for Contact Structure SH Kim, KH Han, GS Kim, SG Kim, J Kim, HY Yu ACS applied materials & interfaces 11 (6), 6230-6237, 2019 | 22 | 2019 |
Reduction of Threshold Voltage Hysteresis of MoS2 Transistors with 3-Aminopropyltriethoxysilane Passivation and Its Application for Improved Synaptic Behavior. KH Han, GS Kim, J Park, SG Kim, JH Park, HY Yu ACS applied materials & interfaces 11 (23), 20949-20955, 2019 | 21 | 2019 |
Fermi-Level Unpinning Using a Ge-Passivated Metal–Interlayer–Semiconductor Structure for Non-Alloyed Ohmic Contact of High-Electron-Mobility Transistors SH Kim, GS Kim, JK Kim, JH Park, C Shin, C Choi, HY Yu IEEE Electron Device Letters 36 (9), 884-886, 2015 | 19 | 2015 |
Steep‐Slope Gate‐Connected Atomic Threshold Switching Field‐Effect Transistor with MoS2 Channel and Its Application to Infrared Detectable Phototransistors SG Kim, SH Kim, GS Kim, H Jeon, T Kim, HY Yu Advanced Science 8 (12), 2100208, 2021 | 17 | 2021 |
Fermi-Level Unpinning Technique with Excellent Thermal Stability for n-Type Germanium GS Kim, SH Kim, TI Lee, BJ Cho, C Choi, C Shin, JH Shim, J Kim, HY Yu ACS Applied Materials & Interfaces 9 (41), 35988-35997, 2017 | 17 | 2017 |
Random Dopant Fluctuation-Induced Threshold Voltage Variation-Immune Ge FinFET With Metal–Interlayer–Semiconductor Source/Drain C Shin, JK Kim, GS Kim, H Lee, C Shin, JK Kim, BJ Cho, HY Yu IEEE Transactions on Electron Devices 63 (11), 4167-4172, 2016 | 17 | 2016 |
Effect of Hydrogen Annealing on Contact Resistance Reduction of Metal–Interlayer–n-Germanium Source/Drain Structure GS Kim, G Yoo, Y Seo, SH Kim, K Cho, BJ Cho, C Shin, JH Park, HY Yu IEEE Electron Device Letters 37 (6), 709-712, 2016 | 17 | 2016 |
Non-Alloyed Ohmic Contacts on GaAs Using Metal-Interlayer-Semiconductor Structure With SF 6 Plasma Treatment SH Kim, GS Kim, SW Kim, JK Kim, C Choi, JH Park, R Choi, HY Yu IEEE Electron Device Letters 37 (4), 373-376, 2016 | 15 | 2016 |
Schottky barrier height modulation of metal–interlayer–semiconductor structure depending on contact surface orientation for multi-gate transistors GS Kim, TI Lee, BJ Cho, HY Yu Applied Physics Letters 114 (1), 2019 | 10 | 2019 |
Contact Resistance Reduction Using Dielectric Materials of Nanoscale Thickness on Silicon for Monolithic 3D Integration SH Kim, GS Kim, S Oh, JH Park, HY Yu Journal of Nanoscience and Nanotechnology 16 (12), 12764-12767, 2016 | 7 | 2016 |
Low-Temperature Hybrid Dopant Activation Technique Using Pulsed Green Laser for Heavily-Doped n-Type SiGe Source/Drain SG Kim, GS Kim, SH Kim, HY Yu IEEE Electron Device Letters 39 (12), 1828-1831, 2018 | 6 | 2018 |