Bich-Yen Nguyen
Bich-Yen Nguyen
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Cited by
Inverse slope isolation and dual surface orientation integration
MG Sadaka, D Eades, J Mogab, BY Nguyen, MO Zavala, GS Spencer
US Patent 7,575,968, 2009
Method for making a semiconductor device with strain enhancement
D Zhang, BY Nguyen, VY Thean, Y Shiho, V Dhandapani
US Patent 7,282,415, 2007
Process for forming high purity thin films
BY Nguyen, JJ Lee, HK Nguyen, Y Limb, PJ Tobin
US Patent 4,987,102, 1991
Method for forming a double-gated semiconductor device
DT Pham, AL Barr, L Mathew, BY Nguyen, AM Vandooren, TR White
US Patent 6,838,322, 2005
High immunity to threshold voltage variability in undoped ultra-thin FDSOI MOSFETs and its physical understanding
O Weber, O Faynot, F Andrieu, C Buj-Dufournet, F Allain, P Scheiblin, ...
2008 IEEE International Electron Devices Meeting, 1-4, 2008
Structure and dielectric properties of amorphous and films as alternative gate dielectric materials
XB Lu, Z Liu, Y Wang, Y Yang, X Wang, H Zhou, B Nguyen
Journal of Applied Physics 94 (2), 1229-1234, 2003
Controlled arrangement of self-organized Ge islands on patterned Si (001) substrates
G Jin, JL Liu, SG Thomas, YH Luo, KL Wang, BY Nguyen
Applied Physics Letters 75 (18), 2752-2754, 1999
Crystallization in hafnia‐and zirconia‐based systems
SV Ushakov, A Navrotsky, Y Yang, S Stemmer, K Kukli, M Ritala, ...
physica status solidi (b) 241 (10), 2268-2278, 2004
Memory device that includes passivated nanoclusters and method for manufacture
R Muralidhar, CK Subramanian, S Madhukar, BE White, MA Sadd, S Zafar, ...
US Patent 6,297,095, 2001
Method of forming a vertical double gate semiconductor device and structure thereof
L Mathew, BY Nguyen, M Sadd, B White
US Patent App. 10/074,732, 2003
High K dielectric film
VS Kaushik, BY Nguyen, SV Pietambaram, JK Schaeffer III
US Patent 6,541,280, 2003
Physical and electrical properties of metal gate electrodes on gate dielectrics
JK Schaeffer, SB Samavedam, DC Gilmer, V Dhandapani, PJ Tobin, ...
Journal of Vacuum Science & Technology B: Microelectronics and Nanometer …, 2003
Process for forming a high-K gate dielectric
VS Kaushik, BY Nguyen, OO Adetutu, CC Hobbs
US Patent 6,184,072, 2001
Method for forming pitch independent contacts and a semiconductor device having the same
KJ Cooper, JH Lin, SS Roth, BJ Roman, CA Mazure, BY Nguyen, WJ Ray
US Patent 5,219,793, 1993
CMOS vertical multiple independent gate field effect transistor (MIGFET)
L Mathew, Y Du, AVY Thean, M Sadd, A Vandooren, C Parker, ...
2004 IEEE International SOI Conference (IEEE Cat. No. 04CH37573), 187-189, 2004
High K dielectric film
BY Nguyen, HW Zhou, XP Wang
US Patent 6,770,923, 2004
Semiconductor device structure and method therefor
TR White, AL Barr, BY Nguyen, MK Orlowski, MG Sadaka, VY Thean
US Patent 7,226,833, 2007
High performance extremely thin SOI (ETSOI) hybrid CMOS with Si channel NFET and strained SiGe channel PFET
K Cheng, A Khakifirooz, N Loubet, S Luning, T Nagumo, M Vinet, Q Liu, ...
2012 International Electron Devices Meeting, 18.1. 1-18.1. 4, 2012
A process/physics-based compact model for nonclassical CMOS device and circuit design
JG Fossum, L Ge, MH Chiang, VP Trivedi, MM Chowdhury, L Mathew, ...
Solid-State Electronics 48 (6), 919-926, 2004
Opsonization of encapsulated Staphylococcus aureus: the role of specific antibody and complement.
HA Verbrugh, PK Peterson, BY Nguyen, SP Sisson, Y Kim
Journal of immunology (Baltimore, Md.: 1950) 129 (4), 1681-1687, 1982
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