| K-means clustering algorithm for multimedia applications with flexible HW/SW co-design F An, HJ Mattausch Journal of Systems Architecture 59 (3), 155-164, 2013 | 36 | 2013 |
| Real-time straight-line detection for XGA-size videos by Hough transform with parallelized voting procedures J Guan, F An, X Zhang, L Chen, HJ Mattausch Sensors 17 (2), 270, 2017 | 29 | 2017 |
| FPGA-based low-visibility enhancement accelerator for video sequence by adaptive histogram equalization with dynamic clip-threshold C Xu, Z Peng, X Hu, W Zhang, L Chen, F An IEEE Transactions on Circuits and Systems I: Regular Papers 67 (11), 3954-3964, 2020 | 28 | 2020 |
| A hardware-efficient recognition accelerator using Haar-like feature and SVM classifier A Luo, F An, X Zhang, HJ Mattausch IEEE Access 7, 14472-14487, 2019 | 27 | 2019 |
| A hardware-efficient vector quantizer based on self-organizing map for high-speed image compression Z Huang, X Zhang, L Chen, Y Zhu, F An, H Wang, S Feng Applied Sciences 7 (11), 1106, 2017 | 22 | 2017 |
| A K-means-based multi-prototype high-speed learning system with FPGA-implemented coprocessor for 1-NN searching F An, T Koide, HJ Mattausch IEICE TRANSACTIONS on Information and Systems 95 (9), 2327-2338, 2012 | 19 | 2012 |
| A memory-based modular architecture for SOM and LVQ with dynamic configuration F An, X Zhang, L Chen, HJ Mattausch IEEE Transactions on Multi-Scale Computing Systems 2 (4), 234-241, 2016 | 17 | 2016 |
| Reconfigurable VLSI implementation for learning vector quantization with on-chip learning circuit X Zhang, F An, L Chen, HJ Mattausch Japanese Journal of Applied Physics 55 (4S), 04EF02, 2016 | 15 | 2016 |
| VLSI realization of learning vector quantization with hardware/software co-design for different applications F An, T Akazawa, S Yamasaki, L Chen, HJ Mattausch Japanese Journal of Applied Physics 54 (4S), 04DE05, 2015 | 15 | 2015 |
| A 4.29 nJ/pixel stereo depth coprocessor with pixel level pipeline and region optimized semi-global matching for IoT application P Dong, Z Chen, Z Li, Y Fu, L Chen, F An IEEE Transactions on Circuits and Systems I: Regular Papers 69 (1), 334-346, 2021 | 13 | 2021 |
| A multi-class objects detection coprocessor with dual feature space and weighted softmax Z Xiao, P Xu, X Wang, L Chen, F An IEEE Transactions on Circuits and Systems II: Express Briefs 67 (9), 1629-1633, 2020 | 13 | 2020 |
| A vector-quantization compression circuit with on-chip learning ability for high-speed image sensor Z Huang, X Zhang, L Chen, Y Zhu, F An, H Wang, S Feng IEEE Access 5, 22132-22143, 2017 | 13 | 2017 |
| A hardware architecture for cell-based feature-extraction and classification using dual-feature space F An, X Zhang, A Luo, L Chen, HJ Mattausch IEEE Transactions on Circuits and Systems for Video Technology 28 (10), 3086 …, 2017 | 13 | 2017 |
| Energy-efficient machine learning accelerator for binary neural networks W Mao, Z Xiao, P Xu, H Ren, D Liu, S Zhao, F An, H Yu Proceedings of the 2020 on Great Lakes Symposium on VLSI, 77-82, 2020 | 12 | 2020 |
| FPGA-based object detection processor with HOG feature and SVM classifier F An, P Xu, Z Xiao, C Wang 2019 32nd IEEE International System-on-Chip Conference (SOCC), 187-190, 2019 | 12 | 2019 |
| Energy-efficient hardware implementation of road-lane detection based on hough transform with parallelized voting procedure and local maximum algorithm J Guan, F An, X Zhang, L Chen, HJ Mattausch IEICE TRANSACTIONS on Information and Systems 102 (6), 1171-1182, 2019 | 12 | 2019 |
| A modular and reconfigurable pipeline architecture for learning vector quantization X Zhang, F An, L Chen, I Ishii, HJ Mattausch IEEE Transactions on Circuits and Systems I: Regular Papers 65 (10), 3312-3325, 2018 | 11 | 2018 |
| A 307-fps 351.7-GOPs/W deep learning FPGA accelerator for real-time scene text recognition S Zhao, F An, H Yu 2019 International Conference on Field-Programmable Technology (ICFPT), 263-266, 2019 | 10 | 2019 |
| A compact hardware architecture for bilateral filter with the combination of approximate computing and look-up table R Yao, L Chen, P Dong, Z Chen, F An IEEE Transactions on Circuits and Systems II: Express Briefs 69 (7), 3324-3328, 2022 | 9 | 2022 |
| Configurable image rectification and disparity refinement for stereo vision P Dong, Z Chen, Z Li, R Yao, W Zhang, Y Zhang, L Chen, C Wang, F An IEEE Transactions on Circuits and Systems II: Express Briefs 69 (10), 3973-3977, 2022 | 8 | 2022 |
