| History-aware, resource-based dynamic scheduling for heterogeneous multi-core processors AZ Jooya, A Baniasadi, M Analoui intervals 800, 1200, 2011 | 20 | 2011 |
| Multiobjective GPU design space exploration optimization A Jooya, N Dimopoulos, A Baniasadi Microprocessors and Microsystems 69, 198-210, 2019 | 13 | 2019 |
| Efficient design space exploration of GPGPU architectures A Jooya, A Baniasadi, NJ Dimopoulos Euro-Par 2012: Parallel Processing Workshops: BDMC, CGWS, HeteroPar, HiBB …, 2013 | 12 | 2013 |
| Accelerating neural network ensemble learning using optimization and quantum annealing techniques A Jooya, B Keshavarz, N Dimopoulos, JS Oberoi Proceedings of the Second International Workshop on Post Moores Era …, 2017 | 9 | 2017 |
| In-training and post-training generalization methods: The case of ppar—α and ppar—γ agonists B Keshavarz-Hedayati, P Guangyuan, A Jooya, NJ Dimopoulos 2015 International Joint Conference on Neural Networks (IJCNN), 1-7, 2015 | 7 | 2015 |
| GPU design space exploration: NN-based models A Jooya, N Dimopoulos, A Baniasadi 2015 IEEE Pacific Rim Conference on Communications, Computers and Signal …, 2015 | 6 | 2015 |
| Program phase detection in heterogeneous multi-core processors AZ Jooya, M Analoui 2009 14th International CSI Computer Conference, 219-224, 2009 | 6 | 2009 |
| Optimum power-performance GPU configuration prediction based on code attributes A Jooya, N Dimopoulos, A Baniasadi 2017 International Conference on High Performance Computing & Simulation …, 2017 | 3 | 2017 |
| Using synchronization stalls in power-aware accelerators A Jooya, A Baniasadi 2013 Design, Automation & Test in Europe Conference & Exhibition (DATE), 400-403, 2013 | 2 | 2013 |
| Dual-Stage Phase Unwrapping B Barabadi, M Gara, A Jooya, A Baniasadi, N Dimopoulos 2019 IEEE Nordic Circuits and Systems Conference (NORCAS): NORCHIP and …, 2019 | 1 | 2019 |
| Scaling of InSAR based phase unwrapping to large data volumes M Gara, B Barabadi, A Jooya, A Baniasadi AGU Fall Meeting Abstracts 2019, G21A-02, 2019 | | 2019 |
| GPGPU design space exploration using neural networks A Jooya | | 2018 |
| Classifying Application Phases in Asymmetric Chip Multiprocessors AZ Jooya, M Analoui arXiv preprint arXiv:1001.2262, 2010 | | 2010 |
| The Effect of Core Number and Core Diversity on Power and Performance in Multicore Processors A Zolfaghari Jooya, M Soryani Advances in Computer Science and Engineering: 13th International CSI …, 2009 | | 2009 |
| The Effect of Core Number and Core Diversity on Power and Performance in Multicore Processors. AZ Jooya, M Soryani CSICC, 251-258, 2008 | | 2008 |
