Amin Farmahini-Farahani
Amin Farmahini-Farahani
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NDA: Near-DRAM acceleration architecture leveraging commodity DRAM devices and standard memory modules
A Farmahini-Farahani, JH Ahn, K Morrow, NS Kim
2015 IEEE 21st International Symposium on High Performance Computer …, 2015
The gem5 simulator: Version 20.0+
J Lowe-Power, AM Ahmad, A Akram, M Alian, R Amslinger, M Andreozzi, ...
arXiv preprint arXiv:2007.03152, 2020
Modular design of high-throughput, low-latency sorting units
A Farmahini-Farahani, HJ Duwe III, MJ Schulte, K Compton
IEEE Transactions on Computers 62 (7), 1389-1402, 2012
DRAMA: An architecture for accelerated processing near memory
A Farmahini-Farahani, JH Ahn, K Morrow, NS Kim
IEEE Computer Architecture Letters 14 (1), 26-29, 2014
Regmutex: Inter-warp gpu register time-sharing
F Khorasani, HA Esfeden, A Farmahini-Farahani, N Jayasena, V Sarkar
2018 ACM/IEEE 45th Annual International Symposium on Computer Architecture …, 2018
The MP7 and CTP-6: multi-hundred Gbps processing boards for calorimeter trigger upgrades at CMS
K Compton, S Dasu, A Farmahini-Farahani, S Fayer, R Fobes, R Frazier, ...
Journal of Instrumentation 7 (12), C12024, 2012
Parallel scalable hardware implementation of asynchronous discrete particle swarm optimization
A Farmahini-Farahani, S Vakili, SM Fakhraie, S Safari, C Lucas
Engineering Applications of Artificial Intelligence 23 (2), 177-187, 2010
SOPC-based architecture for discrete particle swarm optimization
A Farmahini-Farahani, SM Fakhraie, S Safari
2007 14th IEEE international conference on electronics, circuits and systems …, 2007
An efficient hybrid swarm intelligence-gradient optimization method for complex time Green's functions of multilayer media
M Ghaffari-Miab, A Farmahini-Farahani, R Faraji-Dana, C Lucas
Progress In Electromagnetics Research 77, 181-192, 2007
Process variation-aware workload partitioning algorithms for GPUs supporting spatial-multitasking
P Aguilera, J Lee, A Farmahini-Farahani, K Morrow, M Schulte, NS Kim
2014 Design, Automation & Test in Europe Conference & Exhibition (DATE), 1-6, 2014
Scalable architecture for on-chip neural network training using swarm intelligence
A Farmahini-Farahani, SM Fakhraie, S Safari
Proceedings of the conference on Design, automation and test in Europe, 1340 …, 2008
HW/SW partitioning using discrete particle swarm
A Farmahini-Farahani, M Kamal, SM Fakhraie, S Safari
Proceedings of the 17th ACM Great Lakes symposium on VLSI, 359-364, 2007
Locality-aware and sharing-aware cache coherence for collections of processors
AF Farahani, N Jayasena
US Patent 11,119,923, 2021
Near-DRAM acceleration with single-ISA heterogeneous processing in standard memory modules
H Asghari-Moghaddam, A Farmahini-Farahani, K Morrow, JH Ahn, ...
IEEE Micro 36 (1), 24-34, 2016
FPGA design analysis of the clustering algorithm for the CERN large hadron collider
A Gregerson, A Farmahini-Farahani, B Buchli, S Naumov, M Bachtis, ...
2009 17th IEEE Symposium on Field Programmable Custom Computing Machines, 19-26, 2009
Modular high-throughput and low-latency sorting units for FPGAs in the large hadron collider
A Farmahini-Farahani, A Gregerson, M Schulte, K Compton
2011 IEEE 9th Symposium on Application Specific Processors (SASP), 38-45, 2011
Challenges of high-capacity dram stacks and potential directions
A Farmahini-Farahani, S Gurumurthi, G Loh, M Ignatowski
Proceedings of the Workshop on Memory Centric High Performance Computing, 4-13, 2018
Parallel-Genetic-Algorithm-Based HW/SW Partitioning
A Farmahini-Farahani, M Kamal, M Salmani-Jelodar
Parallel Computing in Electrical Engineering, 2006. PAR ELEC 2006 …, 2006
The MP7 and CTP-6: Multi-hundred GBPS processing boards for calorimeter trigger upgrades at CMS, 2012
K Compton, S Dasu, A Farmahini-Farahani, S Fayer, R Fobes, R Frazier
JINSTxg 7, C12024, 0
Dynamic cache bypassing
AF Farahani, DA Roberts
US Patent 10,599,578, 2020
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