Seguir
Cesar Albenes Zeferino
Cesar Albenes Zeferino
Professor of Computer Science, University of Vale do Itajaí
Dirección de correo verificada de univali.br
Título
Citado por
Citado por
Año
SoCIN: a parametric and scalable network-on-chip
CA Zeferino, AA Susin
16th Symposium on Integrated Circuits and Systems Design, 2003. SBCCI 2003 …, 2003
3622003
SPIN: a scalable, packet switched, on-chip micro-network
A Adriahantenaina, H Charlery, A Greiner, L Mortiez, CA Zeferino
2003 Design, Automation and Test in Europe Conference and Exhibition, 70-73 …, 2003
3282003
RASoC: A router soft-core for networks-on-chip
CA Zeferino, ME Kreutz, AA Susin
Proceedings Design, Automation and Test in Europe Conference and Exhibition …, 2004
1592004
A study on communication issues for systems-on-chip
CA Zeferino, ME Kreutz, L Carro, AA Susin
Proceedings. 15th Symposium on Integrated Circuits and Systems Design, 121-126, 2002
1402002
The impact of NoC reuse on the testing of core-based systems
É Cota, M Kreutz, CA Zeferino, L Carro, M Lubaszewski, A Susin
Proceedings. 21st VLSI Test Symposium, 2003., 128-133, 2003
1272003
Paris: a parameterizable interconnect switch for networks-on-chip
CA Zeferino, FGME Santo, AA Susin
Proceedings of the 17th symposium on Integrated circuits and system design …, 2004
562004
Redes-em-Chip: arquiteturas e modelos para avaliação de área e desempenho
CA Zeferino
552003
A solution for dynamic management of user profiles in IoT environments
V Leithardt, D Santos, L Silva, F Viel, C Zeferino, J Silva
IEEE Latin America Transactions 18 (07), 1193-1199, 2020
522020
A review of techniques for implementing elliptic curve point multiplication on hardware
A Verri Lucca, GA Mariano Sborz, VRQ Leithardt, M Beko, ...
Journal of Sensor and Actuator Networks 10 (1), 3, 2020
452020
A low-cost fault-tolerant RISC-V processor for space systems
DA Santos, LM Luza, CA Zeferino, L Dilillo, DR Melo
2020 15th Design & Technology of Integrated Systems in Nanoscale Era (DTIS), 1-5, 2020
382020
Communication architectures for system-on-chip
ME Kreutz, L Carro, CA Zeferino, AA Susin
Symposium on Integrated Circuits and Systems Design, 14-19, 2001
322001
Security mechanisms to improve the availability of a network-on-chip
S Baron, MS Wangham, CA Zeferino
2013 IEEE 20th International Conference on Electronics, Circuits, and …, 2013
292013
An Efficient Interface for the Integration of IoT Devices with Smart Grids
F Viel, L Augusto Silva, VRQ Leithardt, JF De Paz Santana, ...
Sensors 20 (10), 2849, 2020
242020
Internet of Things: Concepts, architectures and technologies
F Viel, LA Silva, RQV Leithardt, CA Zeferino
2018 13th IEEE International Conference on Industry Applications (INDUSCON …, 2018
242018
Bipide–ambiente de desenvolvimento integrado para a arquitetura dos processadores BIP
PV Vieira, ALA Raabe, CA Zeferino
Revista Brasileira de Informática na Educação 18 (1), 32-43, 2010
222010
Performance and security evaluation on a blockchain architecture for license plate recognition systems
I Sestrem Ochôa, V Reis Quietinho Leithardt, L Calbusch, ...
Applied Sciences 11 (3), 1255, 2021
202021
Hybrid impedance-admittance control for upper limb exoskeleton using electromyography
LDL da Silva, TF Pereira, VRQ Leithardt, LO Seman, CA Zeferino
Applied Sciences 10 (20), 7146, 2020
202020
A basic processor for teaching digital circuits and systems design with FPGA
MC Pereira, PV Viera, ALA Raabe, CA Zeferino
2012 VIII Southern Conference on Programmable Logic, 1-6, 2012
182012
Processadores para ensino de conceitos básicos de arquitetura de computadores
D Morandi, ALA Raabe, CA Zeferino
Workshop sobre Educação em Arquitetura de Computadores-WEAC 2006, 17-24, 2006
172006
Reliability analysis of a fault-tolerant RISC-V system-on-chip
DA Santos, LM Luza, L Dilillo, CA Zeferino, DR Melo
Microelectronics Reliability 125, 114346, 2021
152021
El sistema no puede realizar la operación en estos momentos. Inténtalo de nuevo más tarde.
Artículos 1–20